Opin vísindi
Opin vísindi er varðveislusafn vísindaefnis og doktorsritgerða í opnum aðgangi á vegum íslenskra háskóla og Landsbókasafns Íslands - Háskólabókasafns.
Opinn aðgangur að rannsóknaniðurstöðum er í samræmi við 10. gr. laga nr. 3/2003 um opinberan stuðning við vísindarannsóknir sem og kröfur innlendra og erlendra rannsóknasjóða. Markmiðið með opnum aðgangi er að niðurstöður rannsókna séu aðgengilegar sem flestum óhindrað og án endurgjalds á rafrænu formi. Vistun í varðveislusafninu er varanleg og ætlað að tryggja aðgang að vísindaefni íslenskra háskóla í opnum aðgangi um ókomna tíð. Varðveislusafnið Opin vísindi er tengt við rannsóknagáttina IRIS og rannsóknaniðurstöður í opnum aðgangi sem eru skráðar í IRIS eru um leið vistaðar og gerðar aðgengilegar til framtíðar í varðveislusafninu. Með því að safna þessu efni saman í eitt safn verður aðgangur að því einfaldur og þægilegur fyrir alla sem vilja kynna sér það og geta þannig notið þess öfluga vísindastarfs sem fram fer í háskólum landsins.
Varðveislusafnið er OpenAIRE / OpenAIREplus samhæft og samrýmist kröfum sem gerðar eru um birtingu rannsóknaniðurstaðna úr verkefnum sem styrkt eru úr evrópsku rannsóknaáætlununum FP7 og H2020.
Varðveislusafnið notar opna hugbúnaðinn DSpace.
Opinn aðgangur að rannsóknaniðurstöðum er í samræmi við 10. gr. laga nr. 3/2003 um opinberan stuðning við vísindarannsóknir sem og kröfur innlendra og erlendra rannsóknasjóða. Markmiðið með opnum aðgangi er að niðurstöður rannsókna séu aðgengilegar sem flestum óhindrað og án endurgjalds á rafrænu formi. Vistun í varðveislusafninu er varanleg og ætlað að tryggja aðgang að vísindaefni íslenskra háskóla í opnum aðgangi um ókomna tíð. Varðveislusafnið Opin vísindi er tengt við rannsóknagáttina IRIS og rannsóknaniðurstöður í opnum aðgangi sem eru skráðar í IRIS eru um leið vistaðar og gerðar aðgengilegar til framtíðar í varðveislusafninu. Með því að safna þessu efni saman í eitt safn verður aðgangur að því einfaldur og þægilegur fyrir alla sem vilja kynna sér það og geta þannig notið þess öfluga vísindastarfs sem fram fer í háskólum landsins.
Varðveislusafnið er OpenAIRE / OpenAIREplus samhæft og samrýmist kröfum sem gerðar eru um birtingu rannsóknaniðurstaðna úr verkefnum sem styrkt eru úr evrópsku rannsóknaáætlununum FP7 og H2020.
Varðveislusafnið notar opna hugbúnaðinn DSpace.
Nýlega bætt við
Influence of phosphorus on current efficiency in aluminum electrolysis at different current densities
(2017) Meirbekova, Rauan; Haarberg, Geir Martin; Thonstad, Jomar; Saevarsdottir, Gudrun; Department of Engineering
Many factors may contribute to loss of current efficiency (CE) in aluminum reduction and one of them is a presence of impurities. In this work, the effect of phosphorus on CE is studied in a laboratory cell at different current densities. Due to a growing trend toward higher amperage in retrofitted industrial cells, a study is performed both at a representative industrial current density (0.8 A/cm2) and at a high current density (1.5 A/cm2). More resolution was obtained at phosphorus levels comparable to typical industrial concentration in aluminum reduction cell (0-220 mg/kg). It is shown that the effect of phosphorus on the CE is more significant at high current density. Trend lines for the whole concentration range btw. 0 and 630 mg/kg showed a decrease of 1.1% in CE per 100 mg/kg for the high current density and 0.67% per 100 mg/kg at the low current density. The detrimental effect was more pronounced for relatively low phosphorus contents up to 220 mg/kg. A trend line for that smaller range revealed a reduction of 2.5% per 100 mg/kg of phosphorus at 1.5 A/cm2, while at 0.8 A/cm2 a reduction of 0.92% per 100 mg/kg of phosphorus was obtained. This indicates that increasing amperage in retrofitted cells may amplify the detrimental effect of impurities on the current efficiency.
HEX : Scaling honeycombs is easier than scaling clock trees
(2016-08-01) Dolev, Danny; Függer, Matthias; Lenzen, Christoph; Perner, Martin; Schmid, Ulrich; Department of Computer Science
We argue that a hexagonal grid with simple intermediate nodes is a robust alternative to buffered clock trees typically used for clock distribution in VLSI circuits, multi-core processors, and other applications that require accurate synchronization: Our HEX grid is Byzantine fault-tolerant, self-stabilizing, and seamlessly integrates with multiple synchronized clock sources, as used in multi-synchronous Globally Synchronous Locally Asynchronous (GALS) architectures. Moreover, HEX guarantees a small clock skew between neighbors even for wire delays that are only moderately balanced. We provide both a theoretical analysis of the worst-case skew and simulation results that demonstrate a very small average skew.
Synchronous counting and computational algorithm design
(2016-03-01) Dolev, Danny; Heljanko, Keijo; Järvisalo, Matti; Korhonen, Janne H.; Lenzen, Christoph; Rybicki, Joel; Suomela, Jukka; Wieringa, Siert; Department of Computer Science
Consider a complete communication network on n nodes. In synchronous 2-counting, the nodes receive a common clock pulse and they have to agree on which pulses are "odd" and which are "even". Furthermore, the solution needs to be self-stabilising (reaching correct operation from any initial state) and tolerate f Byzantine failures (nodes that send arbitrary misinformation). Prior algorithms either require a source of random bits or a large number of states per node. In this work, we give fast state-optimal deterministic algorithms for the first non-trivial case f=1. To obtain these algorithms, we develop and evaluate two different techniques for algorithm synthesis. Both are based on casting the synthesis problem as a propositional satisfiability (SAT) problem; a direct encoding is efficient for synthesising time-optimal algorithms, while an approach based on counter-example guided abstraction refinement discovers non-optimal algorithms quickly.
Fault-tolerant algorithms for tick-generation in asynchronous logic : Robust pulse generation
(2014-09-08) Dolev, Danny; Függer, Matthias; Schmid, Ulrich; Lenzen, Christoph; Department of Computer Science
Today's hardware technology presents a new challenge in designing robust systems. Deep submicron VLSI technology introduces transient and permanent faults that were never considered in low-level system designs in the past. Still, robustness of that part of the system is crucial and needs to be guaranteed for any successful product. Distributed systems, on the other hand, have been dealing with similar issues for decades. However, neither the basic abstractions nor the complexity of contemporary fault-tolerant distributed algorithms match the peculiarities of hardware implementations. This article is intended to be part of an attempt striving to bridge over this gap between theory and practice for the clock synchronization problem. Solving this task sufficiently well will allow to build an ultrarobust high-precision clocking system for hardware designs like systems-on-chips in critical applications. As our first building block, we describe and prove correct a novel distributed, Byzantine fault-tolerant, probabilistically self-stabilizing pulse synchronization protocol, called FATAL, that can be implemented using standard asynchronous digital logic: Correct FATAL nodes are guaranteed to generate pulses (i.e., unnumbered clock ticks) in a synchronized way, despite a certain fraction of nodes being faulty. FATAL uses randomization only during stabilization and, despite the strict limitations introduced by hardware designs, offers optimal resilience and smaller complexity than all existing protocols. Finally, we show how to leverage FATAL to efficiently generate synchronized, self-stabilizing, high-frequency clocks. 2014 Copyright held by the Owner/Author.
Rigorously modeling self-stabilizing fault-tolerant circuits : An ultra-robust clocking scheme for systems-on-chip
(2014-06) Dolev, Danny; Függer, Matthias; Posch, Markus; Schmid, Ulrich; Steininger, Andreas; Lenzen, Christoph; Department of Computer Science
We present the first implementation of a distributed clock generation scheme for Systems-on-Chip that recovers from an unbounded number of arbitrary transient faults despite a large number of arbitrary permanent faults. We devise self-stabilizing hardware building blocks and a hybrid synchronous/asynchronous state machine enabling metastability-free transitions of the algorithm's states. We provide a comprehensive modeling approach that permits to prove, given correctness of the constructed low-level building blocks, the high-level properties of the synchronization algorithm (which have been established in a more abstract model). We believe this approach to be of interest in its own right, since this is the first technique permitting to mathematically verify, at manageable complexity, high-level properties of a fault-prone system in terms of its very basic components. We evaluate a prototype implementation, which has been designed in VHDL, using the Petrify tool in conjunction with some extensions, and synthesized for an Altera Cyclone FPGA.
Flokkar í Opnum vísindum
Veldu flokk til að skoða.
- University of Iceland
- University of Akureyri
- Bifröst University
- Hólar University College
- IRIS
- Agricultural University of Iceland
- National and University Library of Iceland
- Iceland University of the Arts