dc.contributor |
Háskóli Íslands |
dc.contributor |
University of Iceland |
dc.contributor.author |
Khosa, Rabia Yasmin |
dc.contributor.author |
Chen, J.T. |
dc.contributor.author |
Winters, M. |
dc.contributor.author |
Pálsson, Kjartan |
dc.contributor.author |
Karhu, R. |
dc.contributor.author |
Hassan, J. |
dc.contributor.author |
Rorsman, N. |
dc.contributor.author |
Sveinbjörnsson, Einar |
dc.date.accessioned |
2020-03-27T12:34:12Z |
dc.date.available |
2020-03-27T12:34:12Z |
dc.date.issued |
2019-08-01 |
dc.identifier.issn |
1369-8001 |
dc.identifier.uri |
https://hdl.handle.net/20.500.11815/1669 |
dc.description |
Publisher's version (útgefin grein) |
dc.description.abstract |
We report promising results regarding the possible use of AlN or Al 2 O 3 as a gate dielectric in 4H-SiC MISFETs. The crystalline AlN films are grown by hot wall metal organic chemical vapor deposition (MOCVD) at 1100 °C. The amorphous Al 2 O 3 films are grown by repeated deposition and subsequent low temperature (200 °C) oxidation of thin Al layers using a hot plate. Our investigation shows a very low density of interface traps at the AlN/4H-SiC and the Al 2 O 3 /4H-SiC interface estimated from capacitance-voltage (CV) analysis of MIS capacitors. Current-voltage (IV) analysis shows that the breakdown electric field across the AlN or Al 2 O 3 is ∼ 3 MV/cm or ∼ 5 MV/cm respectively. By depositing an additional SiO 2 layer by plasma enhanced chemical vapor deposition at 300 °C on top of the AlN or Al 2 O 3 layers, it is possible to increase the breakdown voltage of the MIS capacitors significantly without having pronounced impact on the quality of the AlN/SiC or Al 2 O 3 /SiC interfaces. |
dc.description.sponsorship |
This work was financially supported by The Icelandic Research Fund. We also acknowledge support from the Swedish Foundation for Strategic Research ( SSF ), and the Knut and Alice Wallenberg Foundation (KAW). |
dc.format.extent |
55-58 |
dc.language.iso |
en |
dc.publisher |
Elsevier BV |
dc.relation.ispartofseries |
Materials Science in Semiconductor Processing;98 |
dc.rights |
info:eu-repo/semantics/openAccess |
dc.subject |
Al 2 O 3 /4H-SiC interface |
dc.subject |
AlN/4H-SiC interface |
dc.subject |
Interface traps |
dc.subject |
MIS structure |
dc.subject |
Raffræði |
dc.subject |
Rafeindafræði |
dc.title |
Electrical characterization of high k-dielectrics for 4H-SiC MIS devices |
dc.type |
info:eu-repo/semantics/article |
dcterms.license |
This is an open access article under the CC BY-NC-ND license (http://creativecommons.org/licenses/BY-NC-ND/4.0/). |
dc.description.version |
Peer Reviewed |
dc.identifier.journal |
Materials Science in Semiconductor Processing |
dc.identifier.doi |
10.1016/j.mssp.2019.03.025 |
dc.contributor.department |
Science Institute (UI) |
dc.contributor.department |
Raunvísindastofnun (HÍ) |
dc.contributor.school |
Verkfræði- og náttúruvísindasvið (HÍ) |
dc.contributor.school |
School of Engineering and Natural Sciences (UI) |